G.10:4.1 - G.Core linkage (normative)

Builds on: G.Core (Part‑G core invariants; Default Governing Definition Index citation)

GCoreLinkageManifest (G.10) (normative; expands per G.Core:4.2; Nil‑elision applies) Effective obligations/pins/triggers are computed as union(expand(sets), explicit deltas) under Nil‑elision.

• CoreConformanceProfileIds := { GCoreConformanceProfileId.PartG.AuthoringBase, GCoreConformanceProfileId.PartG.TriStateGuard, GCoreConformanceProfileId.PartG.UTSWhenPublicIdsMinted, GCoreConformanceProfileId.PartG.ShippingBoundary }

• RSCRTriggerSetIds := { GCoreTriggerSetId.RefreshOrchestration } (payload pins: PackId(UTS), publicationScopeId, CNSpecRef.edition, CGSpecRef.edition, PlanItemRefs := ⟨WorkPlanRef, planLocalContentLocator⟩[], AuditPins, UTSRowId[], PathId/PathSliceId, crossing policy pins, TelemetryPinIds, relevant upstream artefact ids)

• DefaultsConsumed := { DefaultId.PortfolioMode, DefaultId.DominanceRegime, DefaultId.GammaFoldForR_eff } (Governing definitions are resolved through G.Core.DefaultGoverningDefinitionIndex and are not restated here.)

• CorePinSetIds := { GCorePinSetId.PartG.AuthoringMinimal, GCorePinSetId.PartG.CrossingVisibilityPins }

• CorePinsRequired (pattern delta; pin names only; id‑valued unless noted) := { PackId(UTS), publicationScopeId, contextSliceId?,

  PlanItemRefs := ⟨WorkPlanRef, planLocalContentLocator⟩[]? (WorkPlanning planned baseline refs), AuditPins (pack‑level pin bundle: edition pins (only on …Ref.edition), policy‑ids, UTS/Path pins; ids only),

  UTSRowId[], PathId[]?, PathSliceId[]?, CrossingBundleIds := CrossingBundleId[]?, TelemetryPinIds := TelemetryPinId[]?, PortfolioRosterId?,

  MOOManifestId? (method‑of‑obtaining‑output disclosure; conceptual object id) } (Optional pins from CrossingVisibilityPins MAY be strengthened to unconditional by listing them above; G.10 typically strengthens UTSRowId[] and path/crossing bundles when the pack is publicly shipped.)

• TriggerAliasMapRef := ∅ (canonical trigger ids are used directly)

Mode‑specific definition pins. Any additional pins required for QD/OEE/interop shipping are introduced only by GPatternExtension blocks in G.10:4.6 (never smuggled into the core linkage).